/*

USCR0C UCSRnC

7        6        5     4     3     2      1      0
UMSELn1  UMSELn0  UPMn1 UPMn0 USBSn UCSZn1 UCSZn0 UCPOLn
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      |
|        |        |     |     |     |      |      UCPOLn - Clock polarity
|        |        |     |     |     |      |      0      falling XCKn Edge
|        |        |     |     |     |      |      1      rising XCKn Edge
|        |        |     |     |     |      |      
|        |        |     |     |     UCSZn1 UCSZn0 - Character Size also USCZn2 in UCSRnB
|        |        |     |     |     0      0      5-bit
|        |        |     |     |     0      1      6-bit
|        |        |     |     |     1      0      7-bit
|        |        |     |     |     1      1      8-bit
|        |        |     |     |     
|        |        |     |     USBSn - Stop Bit Select
|        |        |     |     0  1-bit
|        |        |     |     1  2-bit
|        |        |     |     
|        |        UPMn1 UPMn0 Parity Mode
|        |        0     0     Disabled
|        |        0     1     Reserved
|        |        1     0     Enabled, Even Parity
|        |        1     1     Enabled, Odd Parity
|        |
UMSELn1  UMSELn0   USART Mode
0        0       async uart
0        1       sync uart
1        0       (reserved)
1        1       master SPI
*/